In one of conventionally known techniques, a plurality of diffusion layers are formed in a peripheral region in order to provide a high-voltage semiconductor element.
FIG. 9 is a view showing a cross-sectional structure of a conventional semiconductor device described in PTL 1. The conventional semiconductor device described in PTL 1 is a trench-type IGBT (insulated gate bipolar transistor) 500 which includes a cell region and a peripheral region formed in a semiconductor basic substance.
Each of IGBT cells forming the cell region includes an n− type drift layer 51, a p type base layer 52, an n+ type emitter layer 53, a p+ type collector layer 54, an n+ type buffer layer 55, a gate electrode 71 formed in a gate trench 61 with a gate insulating film 62 therebetween, an emitter electrode 72, and a collector electrode 73.
The peripheral region includes: the n− type drift layer 51, the p−type base layer 52, an n+ type channel stopper layer 57, a plurality of p+ type float layers 58, an insulating film 66, and an EQR electrode 75.
In the IGBT 500, if plus voltage is applied to the collector electrode 73 and is gradually increased while the gate is off, a depletion layer 80 extends from the interface between the drift layer 51 and base layer 52, which constitute the cell region, toward the surface of the semiconductor basic substance and toward the peripheral region. The depletion layer 80 extends within the drift layer 51 as indicated by a dashed line and further extends beyond the plurality of float layers 58 close to the channel stopper layer 57. In such a manner, the plural float layers 58 can reduce the curvature of the end of the depletion layer 80 extending within the drift layer 51, thus reducing the electric field concentration. The conventional semiconductor device can therefore have higher breakdown voltage.